Design of Energy Efficient 3GPP Turbo Encoder v5.0 Using High Range IO Standard Using Ultra Scale FPGA

Bhagwan Das; Abdul Aleem Jamali; M.R. Anjum; M.M. Shaikh

Bhagwan Das Department of Electronic Engineering, Quaid-e-Awam University of Engineering, Science and Technology, Nawabshah, Pakistan
Abdul Aleem Jamali Department of Electronic Engineering, Quaid-e-Awam University of Engineering, Science and Technology, Nawabshah, Pakistan
M.R. Anjum Department of Electronic Engineering, The Islamia University of Bahawalpur, Pakistan
M.M. Shaikh Department of Electronic Engineering, Quaid-e-Awam University of Engineering, Science and Technology, Nawabshah, Pakistan

Keywords: 3GPP Turbo Encoder, High Range IO Standard, Thermal efficient, Ultra Scale FPGAAuthor

Abstract

The 3GPP Turbo Encoder v5.0 offers the error correction and the high-speed data rate transmission for LTE at different high frequencies of operation. The execution of 3GPP Turbo Encoder v5.0 at a high frequency of operation increases the on-chip temperature of the encoder. The increase in on-chip temperature of 3GPP Turbo Encoder v5.0 at high frequencies may permanently damage the device and interrupt in data communication. Currently, different techniques have been reported but significant on-chip temperature consumption is not reduced for the on-chip temperature of 3GPP Turbo Encoder v5.0. In this paper, the thermal efficient design for 3GPP Turbo Encoder v5.0 is achieved using IO Standard technique. The 3GPP Turbo Encoder v5.0 is operated with and without IO Standards for different frequencies of operation (i.e. 10 MHz, 20 MHz, 30 MHz, 40 MHz, and 50 MHz) via Ultra Scale FPGA. More than 60% on-chip temperature reduction is achieved for the designed 3GPP Turbo Encoder v5.0 using HR IO standard. The designed 3GPP Turbo Encoder v5.0 using HR IO Standard offers low on-chip temperature consumption for error-free data transmission.