Implementation of Data Encryption Standard (DES) on FPGA

Abstract

Data Encryption can be performed by using two types of algorithms. One is symmetric key and other is asymmetric key algorithm. Symmetric key algorithms are widely used due to less complexity and faster processing as compared to asymmetric key algorithm. Most commonly used symmetric key algorithm is Data Encryption standard (DES). In this paper, we present an efficient implementation of DES algorithm using High Level Language (HLL) approach. The hardware platform use for DES implementation is Spartan 3e XC3S1600E Field Programmable Gate Array (FPGA). Xilinx System Generator is a HLL tool which is used for DES implementation. System Generator provide environment similar to Simulink and provide the facility to pictorially design the system instead of writing thousands lines of code. It provides the synthesizable code of the design which can directly burns on FPGA to get the implementation of design on hardware. We manually customized our design by using conventional blocks of Xilinx System Generator to get optimum performance in terms of speed and area. Our FPGA implementation shows best performance in terms of speed and area as compared with any other software and hardware implementation counterparts, it operates on a frequency of 310.174 MHz and gives a throughput of 1.24GHz, it uses 1344 slices and 120 BRAMs.